Cmdliner
let+
- https://ocaml.org/manual/5.3/bindingops.html
let+ x = xs in f x
corresponds tomap (fun x -> f x) xs
@@
%%VERSION%%
Blocks
Man page 'flags' provided by Cmdliner:
`S | section |
`P | paragraph |
`I | label-text paragraph |
`Pre | pre-formatted text |
`Noblank | suppress blank line between 2 blocks |
`Blocks | list of (more) blocks |
From https://erratique.ch/software/cmdliner/doc/Cmdliner/Manpage/index.html
'Markup'
- Italics:
$(i, text)
- Bold:
$(b, text)
https://erratique.ch/software/cmdliner/doc/tool_man.html#doclang
–
$(tname)
: term name (ie, command name?)$(mname)
: main command name$(iname)
https://erratique.ch/software/cmdliner/doc/Cmdliner/Cmd/index.html#info
–
eval_ok
: type for successful evaluationeval_error
: type for unsuccessful evaluation
https://erratique.ch/software/cmdliner/doc/Cmdliner/Cmd/index.html#eval_low
Term
const value
: aTerm
that evaluates tovalue
($)
/app
: function application with respect toTerm
Evaluate Term
to get Result
, which can be used to get an exit status.
Env
- info: of type
Term.env_info
val info: ?deprecated:string -> ?docs:string -> ?doc:string -> var -> info
- https://erratique.ch/software/cmdliner/doc/Cmdliner/Cmd/Env/index.html#type-info
Cmd
val v : info -> 'a Term.t -> 'a t
v i t
is a command with information i and command line syntax parsed byCmd.t
.
Arg
Converters:
- file: convert to file path. Also checks if the file exists ??
Hardcaml
- Conversion of hardcaml to verilog/vhdl possible
- verilog to hardcaml conversion possible (via yosys): https://github.com/janestreet/hardcaml_of_verilog
- With
Hardcaml.Rtl
: https://github.com/janestreet/hardcaml/blob/master/docs/rtl_generation.md
- With
- Simulation possible in hardcaml (Kinda like clash)
Operations
https://github.com/janestreet/hardcaml/blob/master/docs/combinational_logic.md
- Addition: Args must have same width, result will have that width
(+:)
: addition(-:)
: subtraction
- Multiplication: Args can be of different width, result will have sum of arg widths
(*:)
: unsigned multiplication(*+)
: signed multiplication
(&:)
: logical and(|:)
: logical or(^:)
: logical xor(
:)~: logical not
Vectors:
- Splice:
select v ~high:3 ~low:2
orv.:[3,2]
- Concatenation:
v1 @ v2
menhir
- %inline
- %left, %right, %nonassoc: associativity
- Entries should be written in increasing order of precedence
- %type:
- %token: Declare terminals. Also makes them constructors of token type
- Can be used to make token aliases to improve readability of mly file
- %start: entry point
- %prec: assign precedence
- Can be used with 'dummies'
https://discuss.ocaml.org/t/in-menhir-the-meaning-of-uminus/9054
An annotation of the form %prec id indicates that the precedence level of the production group is the level assigned to the symbol id via a previous %nonassoc, %left, or %right declaration.
- Can be used with 'dummies'
- Generates an ocaml module named
Parser
which may be used in the lex file